In information devices such as wireless communication devices, frequency mixing circuits are indispensable. Along with the progress of information devices, communication modules have been required to be downsized, and there have been increasing needs of a technique for cutting down the number of constituent components especially in wireless communication modules used for mobile phones and wireless LANs.
In a communication module for mobile phones, components such as a power amplifier (PA), a SAW (Surface Acoustic Wave) filter, a switch, and a duplexer have been generally needed in addition to an RFIC (RF semiconductor integrated circuit) for processing an RF signal. However, the SAW filter becomes an obstacle to cost reduction and downsizing of modules, and thus the SAW filter is desirably eliminated. However, in order to eliminate the SAW filter, it is necessary to reduce the noise of respective circuit blocks (a driver amplifier, a quadrature modulator, a D/A converter, a low-pass filter, and the like in a transmitter, and a low-noise amplifier, a down-converter, and the like in a receiver) configuring an RFIC.
In Non-patent Document 1, there is described a passive voltage mixer that is driven by a 25%-duty-cycle LO in order to eliminate a transmission SAW because a gilbert mixer that is an active current mixer generates a considerably-high level of noise. A non-inversion in-phase voltage (VI+), an inversion in-phase voltage (VI−), a non-inversion quadrature voltage (VQ+), and an inversion quadrature voltage (VQ−) are supplied to the sources of four MOS transistors of the passive voltage mixer, and the drains of the four MOS transistors are commonly coupled to an input terminal of a PA driver through a capacitor. It is described that the 25%-duty-cycle LO with quadrature phases drives the gates of the four MOS transistors to increase the input impedance of the PA driver.
In Non-patent Document 2, there is described an I/Q modulator including a two-level passive switch that is driven by a local frequency LO and a double-frequency 2LO in order to eliminate the SAW filter. At the first level, a non-inversion in-phase voltage (BBI+) is supplied to the sources of first and second MOS transistors, an inversion in-phase voltage (BBI−) is supplied to the sources of third and fourth MOS transistors, a non-inversion quadrature voltage (BBQ+) is supplied to the sources of fifth and sixth MOS transistors, and an inversion quadrature voltage (BBQ−) is supplied to the sources of seventh and eighth MOS transistors (in Non-patent Document 2, the description about application of the signals to the sources of the fifth to eighth MOS transistors is wrong). Further, at the first level, anon-inversion local frequency LOI+ is supplied to the gates of the first and fourth MOS transistors, an inversion local frequency LOI− is supplied to the gates of the second and third MOS transistors, a non-inversion local frequency LOQ+ is supplied to the gates of the fifth and eighth MOS transistors, and an inversion local frequency LOQ− is supplied to the gates of the sixth and seventh MOS transistors. Further, at the second level, the source of a ninth MOS transistor is coupled to the drains of the first and third MOS transistors, the source of a tenth MOS transistor is coupled to the drains of the second and fourth MOS transistors, the source of an eleventh MOS transistor is coupled to the drains of the fifth and seventh MOS transistors, and the source of the tenth MOS transistor is coupled to the drains of the sixth and eighth MOS transistors. Further, at the second level, a non-inversion double-frequency 2LO+ is supplied to the gates of the ninth and tenth MOS transistors, and an inversion double-frequency 2LO− is supplied to the gates of the eleventh and twelfth MOS transistors. A differential RF output signal is generated between the drains of the ninth and eleventh MOS transistors and the drains of the tenth and twelfth MOS transistors, and is converted into a single-ended output by On-Chip Baluns to be supplied to an input of a PA driver.
On the other hand, Patent Document 1 describes not the passive mixer described in Non-patent Document 1 or Non-patent Document 2, but a special transmission analog modulator. The analog modulator includes an analog shift register, a plurality of first MOS transistors, a plurality of second MOS transistors, a plurality of capacitors, an operation amplifier, a feedback capacitor, and a feedback MOS transistor. An in-phase component and a quadrature component of a transmission signal are alternately supplied to an input terminal of the analog shift register.
A plurality of outputs of plural cells which are coupled in series in the analog shift register are coupled to one ends of the plural capacitors through the source/drain routes of the plural first MOS transistors, and the other ends of the plural capacitors are commonly coupled to an inversion input terminal of the operation amplifier. The drain/source routes of the plural second MOS transistors are coupled between the one ends of the plural capacitors and the ground potential, and parallel circuits of the feedback capacitor and the feedback MOS transistor are coupled between an output terminal and the inversion input terminal of the operation amplifier. It is described that the plural first MOS transistors and the plural second MOS transistors are switched, so that multiplication can be performed using “+1” and “−1” instead of sine and cosine carrier waves. As described above, the special transmission analog modulator described in Patent Document 1 below is configured using a switched capacitor and a finite impulse response (FIR)-type band-pass filter.
Patent Document 1:
    Japanese patent laid-open No. Hei 01 (1989)-048557 (Sho 64-048557)Non-Patent Document 1:    Xin He et al, “A 45 nm Low-Power SAW-less WCDMA Transmit Modulator Using Direct Quadrature Voltage Modulation”, 2009 IEEE International Solid-State Circuits Conference DIGEST OF Technical PAPERS, PP. 120-121, 121a. 8-12 Feb. 2009”Non-Patent Document 2:    Tirdad Sowlati et al, “Single Chip Multiband WCDMA/HSDPA/HSUPA/EGPRS Transceiver with Diversity Receiver and 3G DigRF Interface Without SAW Filter in Transmitter/3G Receiver Paths”, 2009 IEEE International Solid-State Circuits Conference DIGEST OF Technical PAPERS, PP. 116-117, 117a. 8-12 Feb. 2009